1. Field of the Invention
The present invention relates to electronic units each having a substrate (board) where an electronic circuit is fabricated.
More particularly, the present invention relates to:
first type of electronic units each having a substrate where at least one control circuit for controlling at least one load is fabricated;
second type of electronic units each having a substrate where a clock generator for generating a clock composed of a repetitive series of pulses (clock pulses) to be fed to semiconductor elements, which constitute, for example, a microcomputer, is fabricated; and
third type of electronic units each having a semiconductor substrate, such as a silicon substrate, where at least one semiconductor circuit is fabricated.
2. Description of the Related Art
The conventional first type of electronic units is designed to, for example, drive various types of motors installed in a vehicle.
Specifically, one of the first type electronic units is provided with a control module mainly composed of control elements that constitute a microcomputer and/or a control IC (integrated circuit). The electronic unit is provided with a drive module mainly composed of drive elements, such as power elements. For example, the power elements include DMOS FETs (Double diffused MOS FETS) and/or IGBTs (Insulated Gate Bipolar Transistors).
The first type electronic units can be designed to a hybrid IC (HIC) to be applied to various devices and apparatuses as, for example, a drive circuit for an actuator, such as a motor. Conventionally, an example of the first type electronic units, which is designed to the HIC to be applied to a vehicle as a drive circuit for a motor of a power window of a vehicle, is disclosed in Japanese Unexamined Patent Publication No. H7-67293.
In a vehicle, such as an automobile, a plurality of the electronic units, which are designed to the HICs, are installed. The electronic units are communicably coupled to each other through an in-vehicle LAN (Local Area Network).
CAN (Controller Area Network) protocol and LIN (Local Interconnect Network) protocol are some of the standard communication protocols for the in-vehicle LAN.
FIG. 21 illustrates a structural example of the in-vehicle LAN using the LIN protocol. A plurality of the electronic units serving as master electronic control units (ECUs) and slave ECUs provide the in-vehicle LAN.
Each of the master ECUs is operative to send/receive data to/from the slave ECUs and/or another master ECU. Each of the slave ECUs is operative to communicate with the master ECUs using the LIN protocol. Specifically, each of the slave ECUs is electrically connected to a load, such as a motor, and is operative to receive signals based on the UN protocol from at least one of the master ECUs; these signals to be communicated based on the LIN protocol are referred to as “UN signals”. At least one of the slave ECUs is configured to drive the load based on the received LIN signals.
Each of the slave ECUs has a plurality of input terminals including first terminals at which the LIN signals can be input from the master ECUs, and has a plurality of output terminals including second terminals at which drive signals can be output to the corresponding load.
When checking one of the slave ECUs as a check target slave ECU, LIN signals for check are input from the first terminals in the input terminals while a monitoring device, such as a probe, is connected to one of the output terminals and various terminals mounted on the substrate of the check-target slave ECU. The monitoring device is connected to, for example, a display, so that input-output characteristics of the check-target slave ECU through one of the output terminals and the various terminals in response to the input LIN signals for check are monitored on the display.
The destination of the monitoring device is sequentially changed to another terminal in the output terminals and the various terminals every time one of the input-output characteristics of the check-target slave ECU through one of the output terminals and the various terminals has been completed. This allows the input-output characteristics of the check-target slave ECU through all of the output terminals and the various terminals to be checked.
The check method set forth above, however, may cause the check efficiency to deteriorate due to the connection works of the monitoring device to each of the output terminals and the various terminals.
It is assumed that such a save ECU is downsized to be packaged using a mold resin. In this assumption, however, it may be difficult to connect the monitoring device to each of the various terminals mounted on the substrate of the slave ECU packaged by the mold resin. This may complicate checking of elements, such as a microcomputer and the like, fabricated on the substrate.
On the other hand, clock generators are operative to generate a clock to be fed to semiconductor elements, which constitute, for example, a microcomputer. The clock generators can be designed using a crystal oscillator, a ceramic oscillator, or a capacitance-resistance (CR) oscillation circuit composed of a capacitor and a resistor; an example of these clock generators is disclosed in Japanese Unexamined Patent Publication NO. 2000-357947.
Some of the clock generators each designed to use the crystal oscillator or the ceramic oscillator have been widely used because they are capable of generating a clock with high oscillation accuracy.
The crystal oscillator or the ceramic oscillator however has a difficulty in being integrated with other elements on a single substrate and being packaged by a mold resin. This reason is as follows:
Specifically, the crystal oscillator or the ceramic oscillator has a limit of miniaturization. In addition, the crystal oscillator or the ceramic oscillator is complex in structure because it is configured to oscillate in its inner following portion. The mold package may therefore apply stress on the crystal oscillator or the ceramic oscillator, causing its oscillation accuracy and/or its lifetime to deteriorate.
For these reasons, it may be hard to install the crystal oscillator or the ceramic oscillator in an electronic unit configured to a hybrid IC (Integrated Circuit) or a multi-chip package composed of a plurality of chips mounted on a single substrate and packaged by a mold resin.
In contrast, some of the clock generators each designed to use the CR oscillation circuit can be integrated with other elements on a single substrate because the CR oscillation circuit has a simple structure using resistor(s) and capacitor(s). This allows the CR oscillation circuit to be installed in an electronic unit that is configured to the hybrid IC or the multi-chip package because the CR oscillation circuit can be installed in the interior of an IC fabricated in the hybrid IC or the multi-chip package.
The clock generators each using the CR oscillation circuit, however, may cause variations of resistor's resistances and those of capacitor's capacitances in manufacturing the CR oscillation circuits to have deleterious effect on the oscillation frequencies of the clocks. This may make it difficult for the clock generators each using the CR oscillation circuit to generate a clock whose oscillation frequency has a high accuracy.
In addition, as an example of the conventional third type of electronic units, a monolithically integrated circuit is disclosed in U.S. Pat. No. 5,448,180 corresponding to Japanese Patent Publication No. 3179098.
The monolithically integrated circuit disclosed in the U.S. patent is provided with a protection circuit composed of diodes D1 and D2 in FIG. 1 of the U.S. patent. The diodes D1 and D2 is configured to protect transmitter end stages of the circuit and maintain its full function in the event of a short circuit of bus lines to a voltage supply or ground (i.e., in the event of a short circuit of terminals CANH and CANL to +VCC or VSS).
The invention disclosed in the U.S. patent has a structure to protect the transmitter end stages of the circuit in the event of the short circuit of the bus lines to the voltage supply or ground. The invention disclosed in the U.S. patent may not disclose how to deal with cases where foreign noises each having a voltage higher than that of a voltage supplied from the voltage supply +VCC enter into the bus lines.
As an example of circuits for protecting an output circuit from such foreign noises, a circuit with Zener diodes 534a and 534b as bus protection diodes, which are connected between a bus B and a ground, has been known (see FIG. 22).
Specifically, FIG. 22 illustrates a circuit structure of an ECU 502 installed in a vehicle or the like. The ECU 502 includes semiconductor circuits, such as a peripheral IC 531, a communication transceiver 532, and an MPU (Micro Processing Unit) 540. The ECU 502 also includes a power supply terminal 521, a ground terminal 522, and a communication bus terminal 523. The power supply terminal 521 is connected to the positive terminal of a battery 501 via a power supply cable, and the ground terminal 522 is connected to the negative terminal of the battery 501 via a power supply cable. The communication transceiver 532 is connected through the bus B to communication transceivers (each also referred to as corn TB in FIG. 22) 505, which are disposed at the exterior of the ECU 502.
The Zener diodes 534a and 534b connected back-to-back as the bus protection diodes are provided between the communication bus terminal 523 and the ground terminal 522. The diodes 534a and 534b are operative to protect the communication transceiver 532 from surges and/or noises entering from the exterior of the ECU 502 through the bus B and the communication bus terminal 523.
When a voltage due to the surges and/or noises, which is higher than a Zener breakdown voltage of each Zener diode, is applied between the communication bus terminal 523 and the ground terminal 522, the Zener diodes 534a and 534b allow a current to flow therethrough and not to flow through the communication transceiver 532. This prevents the voltage higher than the Zener breakdown voltage of each of the Zener diodes 534a and 534b from being applied to the communication transceiver 532.
In addition, a reverse-connection protection diode 533 is connected in series between the power supply terminal 521 of the ECU 502 and a power supply terminal of each of the semiconductor circuits installed in the ECU 502. The reverse-connection protection diode 533 can cutoff a reverse current trying to flow from a ground terminal of each of the semiconductor circuits to the power supply terminal thereof when an accidental reversal of the battery 501 occurs.
When, for example, each of the semiconductor circuits 531 and 532 is mounted in a single substrate to be installed in a single chip, it is preferable to fabricate the reverse-connection protection diode 533 and each of the bus protection diodes 534a and 534b in the same chip of the semiconductor circuit 531 or the semiconductor circuit 532. This aims at downsizing of the ECU 502, reduction of the number of elements of the ECU 502, and reduction of the number of man-hours required to assemble the ECU 502.
When fabricating the reverse-connection protection diode 533 and/or each of the bus protection diodes 534a and 534b in the same substrate in which the peripheral IC 531 or the communication transceiver 532 is formed, the following problems may be encountered due to a parasitic diode. The parasitic diode is formed based on a P-N junction of each of the diodes 533, 534a and 534b. 
The parasitic diode will be described hereinafter with reference to FIG. 23. FIG. 23 is a schematic cross sectional view of one of the diodes 533, 534a and 534b formed in the substrate in which the peripheral IC 531 or the communication transceiver 532 is fabricated.
As illustrated in FIG. 23, an N epitaxial region 563 is grown on a P type semiconductor substrate 561, and anode regions 570 and a cathode region 571 are formed in the N epitaxial region 563. An anode terminal 533a is connected to each of the anode regions 570, and a cathode terminal 533b is connected to each of the cathode region 571 and the N epitaxial region 563. The P type semiconductor substrate 561 is electrically connected to the ground terminal of the peripheral IC 531 or the communication transceiver 532.
The structure of each of the diodes 533, 534a and 534b formed in the substrate in which the peripheral IC 531 or the communication transceiver 532 is formed provides a parasitic diode PD in a junction between the P type semiconductor substrate 561 and the N epitaxial region 563.
When the reverse-connection protection diode 533 is fabricated in the same substrate (same chip) of the peripheral IC 531 or the communication transceiver 532, accidental reversal of the battery 501 (see FIG. 22) may cause potential at the positive terminal of the battery 501 to be applied to the P type semiconductor substrate 561. This may cause the parasitic diode to be biased in the forward direction, making it difficult to cutoff the reverse current flowing from the ground terminal to the power supply terminal of the peripheral IC 531 or the communication transceiver 532.
When the bus protection diodes 534a and 534b are fabricated in the same substrate (same chip) of the peripheral IC 531 or the communication transceiver 532, it is assumed that breaking of the power supply cable or disconnection thereof between the negative terminal of the battery 501 and the ground terminal 522 of the ECU 502 occurs. In this assumption, the breaking of the power supply cable or disconnection thereof between the negative terminal of the battery 501 and the ground terminal 522 may cause a current not to flow from the peripheral IC 531 or the communication transceiver 532 to the negative terminal of the battery 501. This may put potential at the ground terminal 522 into floating potential.
In this case, a current pulling in the ECU 502 from the communication transceivers 505 connected to the bus B may increase potential of the P type semiconductor substrate 561, causing the parasitic diode to be biased in the forward direction, This may cause a current to flow through a path A (see FIG. 22) including the parasitic diode PD into the bus B.
The current flow out of the ECU 502 to the bus B may cause interferences through the communication transceivers 505 connected thereto.
These reasons set forth above may oblige the reverse-connection protection diode 533 to be arranged at the exterior of the peripheral IC 531 and at the exterior of the communication transceiver 532 as a discrete element. Similarly, the bus protection diodes 534a and 534b are forced to be arranged at the exterior of the peripheral IC 531 and at the exterior of the communication transceiver 532 as discrete elements.